Department of Electronics and Communication Engineering

"One Week FDP on RECENT RESEARCH TRENDS IN DIGITAL VLSI DESIGN"

(27th – 31st May, 2019)






Registration Form

Fee Rs-500/- only
DD to be drawn in favour of Principal, Aditya Engineering College Payble at surampalem


   Yes     No
Accommodation will be provided on nominal payment basis.

Contact us

Name Designation Department Email Mobile
Mr.G.A Arun Kumar Assistant Professor ECE Dept. arunkumarg@acet.ac.in 9100423969
Mr. T. Anjaiah Assistant Professor ECE Dept. anjibabu_talamala@acet.ac.in 8074429087

About the FDP


The objective of this workshop is to provide theoretical background and hands-on training to the participants on design and implementation aspects of DSP algorithms in ASIC and FPGA for resource constrained applications. Digital Signal Processing (DSP) is a ubiquitous technology which plays the central role in many different areas of applications, e.g., audio, video, image and speech processing, oil and natural gas, and many more. Subject experts will deliver lectures and conduct hands-on practice sessions.


Convener

  • Prof. R.V.Vijaya Krishna
    Head of the Dept.
  • Co-Convener

  • Mr.D.Kishore
    Associate Professor
  • Coordinators

  • Dr. Durgesh Nandan

    Adjunct Professor


  • Mr. G.A.Arun Kumar

    Assistant Professor


  • Mr. T.Anjaiah

    Assistant Professor


Important Dates


Last Date for Online Registration: 23rd May 2019

Information to the selected Participants: 24th May 2019

FDP Commences on: 27th May 2019

Who can Attend


Faculty/ResearchScholars/M.Tech Students/ Industry professionals from the field of Electronics & Communication Engineering, Electrical & Instrumentation Engineering, Computer Science Engineering, IT, Electrical Engineering and Biomedical Engineering can attend.


Chief Patron

Dr. N Sesha Reddy, Chairman
Aditya Educational Institutions

Patron

Sri. N Satish Reddy, Vice Chairman
Aditya Educational Institutions

Co-Patrons

Dr. M Sreenivasa Reddy, Principal
Aditya Engineering College(A)
Dr. T K Rama Krishna Rao, Principal
Aditya College of Engineering & Technology
Dr. A Ramesh, Principal
Aditya College of Engineering

Advisory Committee

  • Dr. KVSR Murthy, Professor
    R&D Head, Aditya Engineering College(A)
  • Prof. A Rama Krishna, Vice Principal
    Aditya College of Engineering & Technology
  • Dr. V Srinivasa Rao, Vice Principal
    Aditya Engineering College(A)
  • Dr. S Rama Sree, Vice Principal
    Aditya Engineering College(A)
  • Prof. G Sridevi, Professor
    Aditya Engineering College(A)
  • Prof. V Satyanarayana, Professor
    Aditya Engineering College(A)
  • Prof. G Rama Krishna, Professor
    Aditya College of Engineering

Organizing Committee

  • Mrs. B.V.Vijaya Sri, Associate Professor
  • Mr. P.Ramesh Kumar, Sr. Assistant Professor
  • Mrs. A.Rama Vasantha, Sr. Assistant Professor
  • Mrs. Sneha M Joesph, Assistant Professor
  • Mr. B.Divakar, Assistant Professor
  • Mr. E.Jagadeeswara Rao, Assistant Professor
  • Mr. S.V.Kiran, Assistant Professor

Resource Persons



  • Dr. Promod Kumar Meher
    Retired Senior Fellow,School of Computer Engg., NTU, Singapore.
  • Prof. B.K. Mohanty
    Research Dean, NMIMS, Shirpur Campus.
  • Dr. Subhendu Kumar Sahoo
    Assoc Prof., NIT Raipur.
  • Dr. Durgesh Nandan
    Adjunct Professor, AEC.
  • Mr. Magnanil Goswami
    Research Mentor, CL Educate Ltd.
  • Mr. N. Srinivas
    Tools Expert.

Topics to be covered in lecture session


    1. Typical DSP algorithms and complexity analysis.
    2. Algorithm mapping and architectural design of Arithmetic Circuits.
    3. Low-power/low-complexity design techniques.
    4. ASIC and FPGA implementation of Various DSP architectures.

Topics for hands-on practice


    1. HDL coding circuit synthesis using Xilinx ISE tools and Vivado.
    2. System generator
    3. Implementation of DSP algorithm in FPGA board.
    4. ASIC Synthesis using Cadence (Overview)